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| Product Specification PE4272 Product Description The PE4272 RF Switch is designed for the TV tuner, PCTV, set top box, DTV, DVR and general broadband applications. This device offers industry leading broadband linearity, 1.5 kV ESD tolerance and a simple CMOS interface. The device offers a simple alternative solution to pin diode and mechanical relay switches. The PE4272 SPDT High Power RF Switch is manufactured on Peregrine's UltraCMOSTM process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram RFC SPDT Broadband UltraCMOSTM DC - 3 GHz RF Switch Features * High ESD tolerance of 1.5 kV * Single-pin CMOS logic control * Low insertion loss: 0.5 dB at 1000 MHz, 0.6 dB at 2000 MHz * Isolation of 43 dB at 1000 MHz, 33.5 dB at 2000 MHz * Typical input 1 dB compression point of +32 dBm * Small 8-lead MSOP package Figure 2. Package Type 8-lead MSOP RF2 RF1 CMOS Control Driver VDD CTRL Table 1. Electrical Specifications @ +25 C, VDD = 3 V (ZS = ZL = 75 ) Parameter Operation Frequency Insertion Loss 1 Conditions DC - 3000 1000 MHz 2000 MHz 1000 MHz 2000 MHz 1000 MHz 2000 MHz 1000 MHz 2000 MHz Min Typ Max Units MHz 0.5 0.6 41 31.5 41 32 43 33.5 43 34 19.5 16 500 500 <3 0.6 0.7 dB Isolation - RFC to RF1/RF2 dB Isolation - RF1 to RF2 Return Loss `ON' Switching Time 3 dB dB 1000 1000 ns ns mVpp dBm dBm 50% CTRL to 0.1 dB final value, 2 GHz 50% CTRL to 25 dB isolation, 2 GHz `OFF' Switching Time3 Video Feedthrough2,3 Input 1 dB Compression3 Input IP33 Notes: 1000 MHz 1000 MHz, 20 dBm input power 30 32 52 1. Device linearity will begin to degrade below 5 MHz. 2. Measured with a 1 ns risetime, 0/3 V pulse and 500 MHz bandwidth. 3. Measured in a 50 system. (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 11 Document No. 70-0173-03 www.psemi.com PE4272 Product Specification Figure 3. Pin Configuration (Top View) Table 4. Absolute Maximum Ratings Symbol VDD Parameter/Conditions Power supply voltage Voltage on any input Storage temperature range Input power (50 ) ESD voltage (HBM, ML_STD 883 Method 3015.7) Min -0.3 -0.3 -65 Max 4.0 VDD+ 0.3 150 34 1500 Units V V C dBm V VDD CTRL GND 1 2 8 7 RF1 VI GND GND RF2 4272 3 4 6 5 TST PIN VESD RFC Table 2. Pin Descriptions Pin No. 1 Pin Name VDD Description Nominal +3 V supply connection. CMOS logic level: High = RFC to RF1 signal path Low = RFC to RF2 signal path Ground connection. Traces should be physically short and connected to ground plane for best performance. RF Common port.4 RF2 port.4 Ground Connection. Traces should be physically short and connected to ground plane for best performance. Ground Connection. Traces should be physically short and connected to ground plane for best performance. RF1 port.4 2 CTRL Absolute Maximum Ratings are those values listed in the above table. Exceeding these values may cause permanent device damage. Functional operation should be restricted to the limits in the Operating Ranges table. Exposure to absolute maximum ratings for extended periods may affect device reliability. Latch-Up Avoidance Unlike conventional CMOS devices, UltraCMOSTM devices are immune to latch-up. Electrostatic Discharge (ESD) Precautions When handling this UltraCMOSTM device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 4. 3 4 5 6 GND RFC RF2 GND 7 8 Note: GND RF1 4. All RF pins must be DC blocked with an external series capacitor or held at 0 VDC. Table 3. Operating Ranges Parameter VDD Power Supply Voltage IDD Power Supply Current (VDD = 3 V, CTRL = 3 V) Operating temperature range Control Voltage High Control Voltage Low -40 0.7xVDD 0.3xVDD Min 2.7 Typ 3.0 8 Max 3.3 20 85 Units V A C V V (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 11 Document No. 70-0173-03 UltraCMOSTM RFIC Solutions PE4272 Product Specification Table 5. Single-pin Control Logic Truth Table Control Voltages Pin 1 (VDD) = VDD Pin 2 (CTRL) = High Pin 1 (VDD) = VDD Pin 2 (CTRL) = Low Control Logic Input The PE4272 is a versatile RF CMOS switch that supports two operating control modes; single-pin control mode and complementary-pin control mode. Single-pin control mode enables the switch to operate with a single control pin (pin 2) supporting a +3-volt CMOS logic input, and requires a dedicated +3-volt power supply connection (pin 1). This mode of operation reduces the number of control lines required and simplifies the switch control interface typically derived from a CMOS Processor I/O port. Complementary-pin control mode allows the switch to operate using complementary control pins CTRL and VDD (pins 2 & 1), that can be directly driven by +3-volt CMOS logic or a suitable Processor I/O port. This enables the PE4272 to operate in positive control voltage mode within the PE4272 operating limits. Signal Path RFC to RF1 RFC to RF2 Table 6. Complementary-pin Control Logic Truth Table Control Voltages Pin 1 (VDD) = Low Pin 2 (CTRL) = High Pin 1 (VDD) = High Pin 2 (CTRL) = Low Signal Path RFC to RF1 RFC to RF2 Document No. 70-0173-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 11 PE4272 Product Specification Evaluation Kit The SPDT Switch Evaluation Kit board was designed to ease customer evaluation of the PE4272 SPDT switch. The RF common port is connected through a 75 transmission line to the bottom F connector, J2. Port 1 and Port 2 are connected through 75 transmission lines to two F connectors on either side of the board, J1 and J3. A through transmission line connects F connectors J4 and J5. This transmission line can be used to estimate the loss of the PCB over the environmental conditions being evaluated. The board is constructed of a two metal layer FR4 material with a total thickness of 0.031". The bottom layer provides ground for the RF transmission lines. The transmission lines were designed using a coplanar waveguide with ground plane model using a trace width of 0.021", trace gaps of 0.030", dielectric thickness of 0.028", copper thickness of 0.0021" and r of 4.3. J6 provides a means for controlling the DC inputs to the device. The lower right pin (J6-2) is connected to the device CTRL input. The upper right pin (J6-1) is connected to the device VDD input. Footprints for decoupling capacitors are provided on both CTRL and VDD traces. It is the responsibility of the customer to determine proper supply decoupling for their design application. Removing these components from the evaluation board has not been shown to degrade RF performance. Figure 4. Evaluation Board Layouts Peregrine specification 101/0243 Figure 5. Evaluation Board Schematic Peregrine specification 102/0309 (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 11 Document No. 70-0173-03 UltraCMOSTM RFIC Solutions PE4272 Product Specification Typical Performance Data Figure 6. Insertion Loss: RFC-RF1 @ 25 C Figure 7. Insertion Loss: RFC-RF1 @ 3 V Figure 8. Insertion Loss: RFC-RF2 @ 25 C Figure 9. Insertion Loss: RFC-RF2 @ 3 V Document No. 70-0173-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 11 PE4272 Product Specification Typical Performance Data Figure 10. Isolation: RFC-RF1 @ 25 C Figure 11. Isolation: RFC-RF1 @ 3 V Figure 12. Isolation: RFC-RF2 @ 25 C Figure 13. Isolation: RFC-RF2 @ 3 V (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 11 Document No. 70-0173-03 UltraCMOSTM RFIC Solutions PE4272 Product Specification Typical Performance Data Figure 14. Isolation: RF1-RF2 @ 25 C Figure 15. Isolation: RF1-RF2 @ 3 V Figure 16. Return Loss: RFC-RF1 @ 25 C Figure 17. Return Loss: RFC-RF1 @ 3 V Document No. 70-0173-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 11 PE4272 Product Specification Typical Performance Data Figure 18. Return Loss: RFC-RF2 @ 25 C Figure 19. Return Loss RFC-RF2 @ 3 V Figure 20. Return Loss: RFC-RF1/RF2 @ 25 C Figure 21. Return Loss: RFC-RF1/RF2 @ 3 V (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 11 Document No. 70-0173-03 UltraCMOSTM RFIC Solutions PE4272 Product Specification Figure 22. Package Drawing 8-lead MSOP TOP VIEW 0.65BSC 8 7 6 5 .525BSC 12o REF 2.450.10 2X 3.000.10 GAGE PLANE 12o REF R 0.90 MIN R 0.90 MIN 0o 0.25 0.510.13 -B- 6o 0.55 0.15 0.95 BSC 0.510.13 1 2 3 4 .25 ABC 2.950.10 -C0.860.08 2.950.10 1.10 MAX -A0.10 A 0.08 +0.07 0.33 -0.08 ABC 0.100.05 3.000.10 4.900.15 3.000.10 FRONT VIEW SIDE VIEW Document No. 70-0173-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 11 PE4272 Product Specification Figure 23. Tape and Reel Specifications 8-lead MSOP Pin1 Table 7. Ordering Information Order Code 4272-01 4272-02 4272-00 4272-51 4272-52 Part Marking 4272 4272 PE4272-EK 4272 4272 Description PE4272-08MSOP-50A PE4272-08MSOP-2000C PE4272-08MSOP-EK PE4272G-08MSOP-50A PE4272G-08MSOP-2000C Package 8-lead MSOP 8-lead MSOP Evaluation Kit Green 8-lead MSOP Green 8-lead MSOP Shipping Method 50 units / Tube 2000 units / T&R 1 / Box 50 units / Tube 2000 units / T&R (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 10 of 11 Document No. 70-0173-03 UltraCMOSTM RFIC Solutions PE4272 Product Specification Sales Offices The Americas Peregrine Semiconductor Corporation 9450 Carroll Park Drive San Diego, CA 92121 Tel 858-731-9400 Fax 858-731-9499 North Asia Pacific Peregrine Semiconductor K.K. 5A-5, 5F Imperial Tower 1-1-1 Uchisaiwaicho, Chiyoda-ku Tokyo 100-0011 Japan Tel: +81-3-3502-5211 Fax: +81-3-3502-5213 Europe Peregrine Semiconductor Europe Batiment Maine 13-15 rue des Quatre Vents F- 92380 Garches, France Tel: +33-1-47-41-91-73 Fax : +33-1-47-41-91-73 Peregrine Semiconductor, Korea #B-2402, Kolon Tripolis, #210 Geumgok-dong, Bundang-gu, Seongnam-si Gyeonggi-do, 463-480 S. Korea Tel: +82-31-728-4300 Fax: +82-31-728-4305 South Asia Pacific Peregrine Semiconductor, China Shanghai, 200040, P.R. China Tel: +86-21-5836-8276 Fax: +86-21-5836-7652 Space and Defense Products Americas: Tel: 505-881-0438 Fax: 505-881-0443 Europe, Asia Pacific: 180 Rue Jean de Guiramand 13852 Aix-En-Provence cedex 3, France Tel: +33(0) 4 4239 3361 Fax: +33(0) 4 4239 7227 For a list of representatives in your area, please refer to our Web site at: www.psemi.com Data Sheet Identification Advance Information The product is in a formative or design stage. The data sheet contains design target specifications for product development. Specifications and features may change in any manner without notice. The information in this data sheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. No patent rights or licenses to any circuits described in this data sheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, and UTSi are registered trademarks and UltraCMOS and HaRP are trademarks of Peregrine Semiconductor Corp. Preliminary Specification The data sheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification The data sheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a DCN (Document Change Notice). Document No. 70-0173-03 www.psemi.com (c)2005 Peregrine Semiconductor Corp. All rights reserved. Page 11 of 11 |
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